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FPGA based memory efficient high resolution stereo vision system for video tolling.

Y. Shan, Z. Wang, W. Wang, Y. Hao, Y. Wang, K. Tsoi, W. Luk, and H. Yang. FPT, page 29-32. IEEE, (2012)

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Yang Yang

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Streaming sorting network based BWT acceleration on FPGA for lossless compression.B. Zhao, Y. Li, Y. Wang, and H. Yang. FPT, page 247-250. IEEE, (2017)Spatial-Temporal Attention Res-TCN for Skeleton-Based Dynamic Hand Gesture Recognition.J. Hou, G. Wang, X. Chen, J. Xue, R. Zhu, and H. Yang. ECCV Workshops (6), volume 11134 of Lecture Notes in Computer Science, page 273-286. Springer, (2018)HDC-IM: Hyperdimensional Computing In-Memory Architecture based on RRAM.J. Liu, M. Ma, Z. Zhu, Y. Wang, and H. Yang. ICECS, page 450-453. IEEE, (2019)HW/SW co-design of nonvolatile IO system in energy harvesting sensor nodes for optimal data acquisition.Z. Li, Y. Liu, D. Zhang, C. Xue, Z. Wang, X. Shi, W. Sun, J. Shu, and H. Yang. DAC, page 154:1-154:6. ACM, (2016)14.2 A 65nm 24.7µJ/Frame 12.3mW Activation-Similarity-Aware Convolutional Neural Network Video Processor Using Hybrid Precision, Inter-Frame Data Reuse and Mixed-Bit-Width Difference-Frame Data Codec.Z. Yuan, Y. Yang, J. Yue, R. Liu, X. Feng, Z. Lin, X. Wu, X. Li, H. Yang, and Y. Liu. ISSCC, page 232-234. IEEE, (2020)FTT-NAS: Discovering Fault-Tolerant Neural Architecture.W. Li, X. Ning, G. Ge, X. Chen, Y. Wang, and H. Yang. ASP-DAC, page 211-216. IEEE, (2020)A Task Failure Rate Aware Dual-Channel Solar Power System for Nonvolatile Sensor Nodes.F. Su, Y. Liu, X. Sheng, H. Lee, N. Chang, and H. Yang. ACM Trans. Embed. Comput. Syst., 18 (4): 33:1-33:21 (2019)Blind drift calibration of sensor networks using signal space projection and Kalman filter.Y. Wang, A. Yang, Z. Li, P. Wang, and H. Yang. ISSNIP, page 1-6. IEEE, (2015)Design of variable latency adder based on present and transitional states prediction.X. Yang, F. Qiao, C. Liu, and H. Yang. PATMOS, page 120-125. IEEE, (2013)Gate replacement techniques for simultaneous leakage and aging optimization.Y. Wang, X. Chen, W. Wang, Y. Cao, Y. Xie, and H. Yang. DATE, page 328-333. IEEE, (2009)

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Disambiguation of "Yang, Huazhong"

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FPGA based memory efficient high resolution stereo vision system for video tolling.

Please choose a person to relate this publication to

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Yang, Huazhong"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML FPGA based memory efficient high resolution stereo vision system for video tolling.

Please choose a person to relate this publication to

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Other publications of authors with the same name

Disambiguation

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URL
DOI
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APA
Chicago
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FPGA based memory efficient high resolution stereo vision system for video tolling.