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Disambiguation of "Bampi, Sergio"

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Designing a 9.3μW Low-Power Time-to-Digital Converter (TDC) for a Time Assisted SAR ADC.

, , , and . SBCCI, page 1-6. IEEE, (2022)

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Richard Bampi

Sergio Dellavalle

Sergio Moccia

Sergio Scognamillo

Sérgio Campos

 

Other publications of authors with the same name

Hybrid Scratchpad Video Memory Architecture for Energy-Efficient Parallel HEVC., , , , and . IEEE Trans. Circuits Syst. Video Techn., 29 (10): 3046-3060 (2019)A new array architecture for signed multiplication using Gray encoded radix-2m operands., , and . Integr., 40 (2): 118-132 (2007)The 4-2 Fused Adder-Subtractor Compressor for Low-Power Butterfly-Based Hardware Architectures., , , , , , and . Circuits Syst. Signal Process., 41 (3): 1577-1595 (2022)Iterative random search: a new local minima resistant algorithm for motion estimation in high-definition videos., , , , , , and . Multim. Tools Appl., 63 (1): 107-127 (2013)Exploring high-order adder compressors for power reduction in sum of absolute differences architectures for real-time UHD video encoding., , , , , , and . J. Real Time Image Process., 17 (5): 1735-1754 (2020)ReAdapt: A Reconfigurable Datapath for Runtime Energy-Quality Scalable Adaptive Filters., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (1): 327-339 (January 2023)A 300mV-Supply, Sub-nW-Power Digital-Based Operational Transconductance Amplifier., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 68 (9): 3073-3077 (2021)An Energy-Efficient Haar Wavelet Transform Architecture for Respiratory Signal Processing., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 68 (2): 597-601 (2021)Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization., , , , , , , , , and 31 other author(s). CoRR, (2020)Modeling and designing high performance analog reconfigurable circuits., , and . SBCCI, page 49-54. ACM, (2004)