Author of the publication

On Design and Performance Analysis of a Superscalar Architecture.

, , and . ICPP (1), page 171-178. CRC Press, (1992)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A Multi-Standard Viterbi Decoder for Mobile Applications Using a Reconfigurable Architecture., , and . VTC Fall, page 1-5. IEEE, (2006)Editorial notes: Special issue on on-chip parallel and network-based systems., and . Microprocess. Microsystems, 36 (7): 529-530 (2012)Resource management and task partitioning and scheduling on a run-time reconfigurable embedded system., , and . Comput. Electr. Eng., 35 (2): 258-285 (2009)Capacitive and Inductive TSV-to-TSV Resilient Approaches for 3D ICs., , , , and . IEEE Trans. Computers, 65 (3): 693-705 (2016)Design of a router for network-on-chip., , and . Int. J. High Perform. Syst. Archit., 1 (2): 98-105 (2007)Persepolis: Recovering history with a handheld camera., , , and . Eurographics (Posters), Eurographics Association, (2003)Flow mapping and data distribution on mesh-based deep learning accelerator., , , , and . NOCS, page 13:1-13:8. ACM, (2019)A scalable delay insensitive asynchronous NoC with adaptive routing., , and . ICT, page 995-1002. IEEE, (2010)Near-optimal message routing and broadcasting in faulty hypercubes., and . Int. J. Parallel Program., 19 (5): 405-423 (1990)Performance of symbolic applications on a parallel architecture., , , and . Int. J. Parallel Program., 16 (3): 183-214 (1987)