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Disambiguation of "Rupnow, Kyle"

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Automated Verification Code Generation in HLS Using Software Execution Traces (Abstract Only).

, , , , and . FPGA, page 278. ACM, (2016)

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Kyle Simek

J Kyle Ward

Kyle Krafka

Kyle Montague

Kyle Jamieson

 

Other publications of authors with the same name

Dynamic Binding and Scheduling of Firm-Deadline Tasks on Heterogeneous Compute Resources., , , and . RTCSA, page 275-280. IEEE Computer Society, (2010)Integrated CUDA-to-FPGA Synthesis with Network-on-Chip., , , , , and . FCCM, page 21-24. IEEE Computer Society, (2014)AutoSLIDE: Automatic Source-Level Instrumentation and Debugging for HLS., , , and . FCCM, page 127-130. IEEE Computer Society, (2016)High-level synthesis with behavioral level multi-cycle path analysis., , , , and . FPL, page 1-8. IEEE, (2013)Behavioral-level IP integration in high-level synthesis., , , and . FPT, page 172-175. IEEE, (2015)Debugging and verifying SoC designs through effective cross-layer hardware-software co-simulation., , , , , and . DAC, page 7:1-7:6. ACM, (2016)An Accurate GPU Performance Model for Effective Control Flow Divergence Optimization., , , and . IPDPS, page 83-94. IEEE Computer Society, (2012)SkyNet: a Hardware-Efficient Method for Object Detection and Tracking on Embedded Systems., , , , , , , , , and 2 other author(s). MLSys, mlsys.org, (2020)Performance metrics for hybrid multi-tasking systems., , , and . FPL, page 547-550. IEEE, (2009)Fast and effective placement and routing directed high-level synthesis for FPGAs., , , and . FPGA, page 1-10. ACM, (2014)