Author of the publication

A 25-35 GHz 5-bit digital attenuator with low RMS amplitude error and low phase variation in 65 nm CMOS.

, , , and . IEICE Electron. Express, 16 (15): 20190394 (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A 77-GHz Mixed-Mode FMCW Generator Based on a Vernier TDC with Dual Rising-Edge Fractional-Phase Detector., , , , , , and . A-SSCC, page 79-82. IEEE, (2018)International Solid-State Circuits Conference 2019 aims at "envisioning the future"., and . Sci. China Inf. Sci., 62 (6): 67401:1-67401:2 (2019)A Fully-Integrated Reconfigurable Dual-Band Transceiver for Short Range Wireless Communications in 180 nm CMOS., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 50 (11): 2572-2590 (2015)A Low-Power High-Data-Rate ASK IF Receiver With a Digital-Control AGC Loop., , and . IEEE Trans. Circuits Syst. II Express Briefs, 57-II (8): 617-621 (2010)A Compact E-Band Load-Modulation Balanced Power Amplifier Using Coupled Transmission-Line Output Network Achieving 22.1-dBm Psat and 34.9%/12.2% Efficiency at Psat/6-dB PBO., , , , and . A-SSCC, page 1-3. IEEE, (2023)Relay-Based Cooperative Spectrum Sensing with Improved Energy Detection In Cognitive Radio., , , and . BWCCA, page 227-231. IEEE Computer Society, (2015)An 8.2-to-21.5 GHz Dual-Core Quad-Mode Orthogonal-Coupled VCO with Concurrently Dual-Output using Parallel 8-Shaped Resonator., , , , , , and . CICC, page 1-2. IEEE, (2021)A reconfigurable IF receiver supporting intra-band non-contiguous carrier aggregation in 65 nm CMOS., , , , and . ISCAS, page 1554-1557. IEEE, (2016)Scalable behavior modeling for SCR based ESD protection structures for circuit simulation., , , , , , , , , and 3 other author(s). ISCAS, page 2333-2336. IEEE, (2014)A Fully Integrated 27.5-30.5 GHz 8-Element Phased-Array Transmit Front-end Module in 65 nm CMOS., , , , , , , and . A-SSCC, page 153-156. IEEE, (2019)