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4.5 A Reconfigurable, Multi-Channel Quantized-Analog Transmitter with <-35dB EVM and <-51dBc ACLR in 22nm FDSOI., , и . ISSCC, стр. 84-86. IEEE, (2024)F4: Wireless low-power transceivers for local and wide-area networks., , , , и . ISSCC, стр. 509-511. IEEE, (2017)Two-Dimensions Vernier Time-to-Digital Converter., , и . IEEE J. Solid State Circuits, 45 (8): 1504-1512 (2010)DC-Coupled Biasing Technique for Quantized-Analog Amplifiers., и . IEEE Trans. Circuits Syst. II Express Briefs, 71 (9): 4146-4150 (сентября 2024)20.9 A 1.92mW filtering transimpedance amplifier for RF current passive mixers., и . ISSCC, стр. 358-359. IEEE, (2016)A low-power sub-GHz RF receiver front-end with enhanced blocker tolerance., , и . CICC, стр. 1-4. IEEE, (2018)Low-Power QPSK Transmitter Based on an Injection-Locked Power Amplifier., , и . ESSCIRC, стр. 134-137. IEEE, (2018)A Digital Filtering ADC With Programmable Blocker Cancellation for Wireless Receivers., , , и . IEEE J. Solid State Circuits, 53 (3): 681-691 (2018)A 0.13 μm CMOS front-end, for DCS1800/UMTS/802.11b-g with multiband positive feedback low-noise amplifier., , , и . IEEE J. Solid State Circuits, 41 (4): 981-989 (2006)A 5.4mW GPS CMOS Quadrature Front-End Based on a Single-Stage LNA-Mixer-VCO., , , , , и . ISSCC, стр. 1892-1901. IEEE, (2006)