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Disambiguation of "Wambacq, Piet"

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Technologies for (sub-) 45nm Analog/RF CMOS - Circuit Design Opportunities and Challenges.

, , , , and . CICC, page 679-686. IEEE, (2006)

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Piet Jonas

Piet Engelke

Piet Meerendonk

Piet Hensel

Piet Hensel

 

Other publications of authors with the same name

The Promise of 2-D Materials for Scaled Digital and Analog Applications., , , , , , , , , and 2 other author(s). ISSCC, page 394-395. IEEE, (2023)Fractional-N Sub-Sampling PLL Using a Calibrated Delay Line for Phase Noise Cancellation., , , and . ISCAS, page 1-5. IEEE, (2021)Digital Ground Bounce Reduction by Phase Modulation of the Clock., , , , , and . DATE, page 88-93. IEEE Computer Society, (2004)A Single-Channel, 600-MS/s, 12-b, Ringamp-Based Pipelined ADC in 28-nm CMOS., , , , and . IEEE J. Solid State Circuits, 54 (2): 403-416 (2019)An 80 GHz Low-Noise Amplifier Resilient to the TX Spillover in Phase-Modulated Continuous-Wave Radars., , , , , , , and . IEEE J. Solid State Circuits, 51 (5): 1141-1153 (2016)Digital ground bounce reduction by supply current shaping and clock frequency Modulation., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 24 (1): 65-76 (2005)Inductor-based ESD protection under CDM-like ESD stress conditions for RF applications., , , , , , , and . CICC, page 49-52. IEEE, (2008)An up to 36Gbps analog baseband equalizer and demodulator for mm-wave wireless communication in 28nm CMOS., , , and . CICC, page 1-4. IEEE, (2017)A 79GHz variable gain low-noise amplifier and power amplifier in 28nm CMOS operating up to 125°C., , , and . ESSCIRC, page 183-186. IEEE, (2014)A 6.2mW 7b 3.5GS/s time interleaved 2-stage pipelined ADC in 40nm CMOS., , , and . ESSCIRC, page 75-78. IEEE, (2014)