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Analysis and Optimization of Enhanced MTCMOS Scheme., , и . VLSI Design, стр. 234-239. IEEE Computer Society, (2004)Techniques for multilayer channel routing., , , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 7 (6): 698-712 (1988)Chameleon: a new multi-layer channel router., , , , , , и . DAC, стр. 495-502. IEEE Computer Society Press, (1986)Technology trends and implications on SoC design.. SoCC, стр. 386. IEEE, (2011)The Effect of Wire Length Minimization on Yield., , и . DFT, стр. 97-105. IEEE Computer Society, (1994)Performance Driven Synthesis for Pass-Transistor Logic., , , и . VLSI Design, стр. 372-377. IEEE Computer Society, (1999)Dynamically Optimized Synchronous Communication for Low Power System on Chip Designs., , и . ICCD, стр. 134-139. IEEE Computer Society, (2003)A 1.0-GHz single-issue 64-bit powerPC integer processor., , , , , , , , , и 7 other автор(ы). IEEE J. Solid State Circuits, 33 (11): 1600-1608 (1998)Efficient techniques for gate leakage estimation., , , и . ISLPED, стр. 100-103. ACM, (2003)A Heuristic to Determine Low Leakage Sleep State Vectors for CMOS Combinational Circuits., , , и . ICCAD, стр. 689-692. IEEE Computer Society / ACM, (2003)