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Improved analysis of low frequency noise in dynamic threshold MOS/SOI transistors.

, , , and . Microelectron. Reliab., 41 (6): 855-860 (2001)

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6T SRAM performance and power gain using double gate MOS in 28nm FDSOI technology., , , , and . ICICDT, page 89-92. IEEE, (2013)Statistical analysis of dynamic variability in 28nm FD-SOI MOSFETs., , , , , and . ESSDERC, page 214-217. IEEE, (2014)Characterization, modeling and comparison of 1/f noise in Si/SiGe: C HBTs issued from three advanced BiCMOS technologies., , , , , , , and . ICM, page 1-4. IEEE, (2017)0.25 μm SOI technologies performance for low-power radio-frequency applications., , , , , , and . ICECS, page 45-48. IEEE, (2000)Impact of front-back gate coupling on low frequency noise in 28 nm FDSOI MOSFETs., , , , , , , and . ESSDERC, page 334-337. IEEE, (2012)Impact of a 10nm Ultra-Thin BOX (UTBOX) and Ground Plane on FDSOI devices for 32nm node and below., , , , , , , , , and 21 other author(s). ESSCIRC, page 88-91. IEEE, (2009)28nm FDSOI Platform with Embedded PCM for IoT, ULP, Digital, Analog, Automotive and others Applications., , , , , and . ESSDERC, page 7-10. IEEE, (2019)Study of low frequency noise in advanced SiGe: C heterojunction bipolar transistors., , , , , , and . ESSDERC, page 373-376. IEEE, (2014)Circuit optimization of 4T, 6T, 8T, 10T SRAM bitcells in 28nm UTBB FD-SOI technology using back-gate bias control., , , , , and . ESSCIRC, page 415-418. IEEE, (2013)Circuit-level evaluation of a new zero-cost transistor in an embedded non-volatile memory CMOS technology., , , , , , , , , and 1 other author(s). DTIS, page 1-5. IEEE, (2021)