( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Error Detection and Handling in a Superscalar, Speculative Out-of-Order Execution Processor System.

, , , , , , , , , , и . FTCS, стр. 464-471. IEEE Computer Society, (1995)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Abhinav Saxena

Ambrish Saxena

Sabine Saxena

Amit Saxena

Krishna Saxena

 

Другие публикации лиц с тем же именем

On the Measurement of Safe Fault Failure Rates in High-Performance Compute Processors., , , , и . ITC, стр. 1-10. IEEE, (2020)Error Model (EM) - A New Way of Doing Fault Simulation., и . ITC, стр. 324-333. IEEE, (2022)Characterizing and Mitigating Soft Errors in GPU DRAM., , , , , , , , и . MICRO, стр. 641-653. ACM, (2021)Finite state machine synthesis with concurrent error detection., , и . ITC, стр. 672-679. IEEE Computer Society, (1999)How Many Test Patterns are Useless?, , , и . VTS, стр. 23-28. IEEE Computer Society, (2008)Low Overhead Tag Error Mitigation for GPU Architectures., , , , и . DSN, стр. 314-321. IEEE Computer Society, (2018)Design Verification of a Super-Scalar RISC Processor., , , , , , , и . FTCS, стр. 472-477. IEEE Computer Society, (1995)Techniques for Estimation of Design Diversity for Combinational Logic Circuits., , и . DSN, стр. 25-36. IEEE Computer Society, (2001)Optimizing Large-Scale Fault Injection Experiments through Martingale Hypothesis: A Systematic Approach for Reliability Assessment of Safety-Critical Systems., , , , и . DSN-S, стр. 111-117. IEEE, (2024)Analysis of Checksums, Extended-Precision Checksums, and Cyclic Redundancy Checks., и . IEEE Trans. Computers, 39 (7): 969-975 (1990)