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Characterizing and Mitigating Soft Errors in GPU DRAM., , , , , , , , и . MICRO, стр. 641-653. ACM, (2021)Error Model (EM) - A New Way of Doing Fault Simulation., и . ITC, стр. 324-333. IEEE, (2022)On the Measurement of Safe Fault Failure Rates in High-Performance Compute Processors., , , , и . ITC, стр. 1-10. IEEE, (2020)Low Overhead Tag Error Mitigation for GPU Architectures., , , , и . DSN, стр. 314-321. IEEE Computer Society, (2018)Techniques for Estimation of Design Diversity for Combinational Logic Circuits., , и . DSN, стр. 25-36. IEEE Computer Society, (2001)Design Verification of a Super-Scalar RISC Processor., , , , , , , и . FTCS, стр. 472-477. IEEE Computer Society, (1995)How Many Test Patterns are Useless?, , , и . VTS, стр. 23-28. IEEE Computer Society, (2008)Finite state machine synthesis with concurrent error detection., , и . ITC, стр. 672-679. IEEE Computer Society, (1999)Refined Bounds on Signature Analysis Aliasing for Random Testing., , и . ITC, стр. 818-827. IEEE Computer Society, (1991)Bounds on Signature Analysis Aliasing for Random Testing., , и . FTCS, стр. 104-113. IEEE Computer Society, (1991)