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A fine-resolution pulse-shrinking time-to-digital converter with completion detection utilizing built-in offset pulse., , , и . A-SSCC, стр. 313-316. IEEE, (2016)Session 26 overview: High-speed data converters., и . ISSCC, стр. 460-461. IEEE, (2013)F1: High-speed interleaved ADCs., , , и . ISSCC, стр. 1-2. IEEE, (2015)Time-to-digital converter based on time difference amplifier with non-linearity calibration., , , , и . ESSCIRC, стр. 266-269. IEEE, (2010)A structured routing architecture and its design methodology suitable for high-throughput electron beam direct writing with character projection., , , , , и . ISPD, стр. 69-76. ACM, (2013)A Consideration on LUT Linearization of Stochastic ADC in Sub-Ranging Architecture., , , , , и . MWSCAS, стр. 408-411. IEEE, (2018)Tracking PVT variations of Pulse Width Controlled PLL using variable-length ring oscillator., , , и . NORCAS, стр. 1-4. IEEE, (2015)A 40-kS/s 16-bit non-binary SAR ADC in 0.18 CMOS with noise-tunable comparator., , , и . ICECS, стр. 1-4. IEEE, (2017)Timing-Driven Redundant Contact Insertion for Standard Cell Yield Enhancement., , и . ICECS, стр. 704-707. IEEE, (2006)Resonant power supply noise reduction using a triangular active charge injection., , , и . ICECS, стр. 113-116. IEEE, (2016)