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A method of hidden faults opposition for FPGA-based components of safety-related systems.

, , , , and . CMIS, volume 2608 of CEUR Workshop Proceedings, page 311-322. CEUR-WS.org, (2020)

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Use of Natural LUT Redundancy to Improve Trustworthiness of FPGA Design., , and . ICTERI, volume 1614 of CEUR Workshop Proceedings, page 322-331. CEUR-WS.org, (2016)A method of hidden faults opposition for FPGA-based components of safety-related systems., , , , and . CMIS, volume 2608 of CEUR Workshop Proceedings, page 311-322. CEUR-WS.org, (2020)Power-Consumption-Oriented Checkability for FPGA-based Components of Safety-Related Systems., , , , and . Int. J. Comput., (2019)Power-Oriented Checkability of Matrix and Pipeline Circuits in FPGA-Based Digital Components of Safety-Related Systems., , , and . ICTERI Workshops, volume 2393 of CEUR Workshop Proceedings, page 749-761. CEUR-WS.org, (2019)A Method of Common Signal Monitoring in FPGA-Based Components of Safety-Related Systems., , , and . CMIS, volume 2353 of CEUR Workshop Proceedings, page 924-934. CEUR-WS.org, (2019)Sharing of Functional and Special Means in Pipeline Floating-Point Systems with Strongly Connected Versions., , , , and . IDAACS, page 249-253. IEEE, (2019)Models and methods checking mantissas by inequalities for on-line testing of digital circuits in critical applications., , , , and . EWDTS, page 1-5. IEEE Computer Society, (2017)Evolution of a Problem of the Hidden Faults in the Digital Components of Safety-Related Systens., , , , , and . EWDTS, page 1-5. IEEE, (2018)Improving of a Circuit Checkability and Trustworthiness of Data Processing Results in LUT-based FPGA Components of Safety-Related Systems., , , and . ICTERI, volume 1844 of CEUR Workshop Proceedings, page 654-661. CEUR-WS.org, (2017)Features of Hidden Fault Detection in Pipeline Digital Components of Safety-Related Systems., , and . ICTERI, volume 1356 of CEUR Workshop Proceedings, page 476-485. CEUR-WS.org, (2015)