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Design Techniques for Zero Steady-State Output Ripple in Digital Low Dropout Regulators., , and . MWSCAS, page 1041-1044. IEEE, (2019)Analog Layout Generation using Optimized Primitives., , , , , and . DATE, page 1234-1239. IEEE, (2021)A general approach for identifying hierarchical symmetry constraints for analog circuit layout., , , , , and . ICCAD, page 120:1-120:8. IEEE, (2020)Learning from Experience: Applying ML to Analog Circuit Design., , , , , , , , , and 2 other author(s). ISPD, page 55. ACM, (2020)From Specification to Silicon: Towards Analog/Mixed-Signal Design Automation using Surrogate NN Models with Transfer Learning., , , , , , , , , and 5 other author(s). ICCAD, page 1-9. IEEE, (2021)Common-Centroid Layouts for Analog Circuits: Advantages and Limitations., , , , , , and . DATE, page 1224-1229. IEEE, (2021)Common-Centroid Layout for Active and Passive Devices: A Review and the Road Ahead., , , , , and . ASP-DAC, page 114-121. IEEE, (2022)Machine Learning Techniques in Analog Layout Automation., , , , , , , , , and 3 other author(s). ISPD, page 71-72. ACM, (2021)MMM: Machine Learning-Based Macro-Modeling for Linear Analog ICs and ADC/DACs., , , , , and . MLCAD, page 1-6. IEEE, (2023)A Customized Graph Neural Network Model for Guiding Analog IC Placement., , , , , , , and . ICCAD, page 135:1-135:9. IEEE, (2020)