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Disambiguation of "Angiolini, Federico"

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Efficient Sample Delay Calculation for 2-D and 3-D Ultrasound Imaging.

, , , , , , , and . IEEE Trans. Biomed. Circuits Syst., 11 (4): 815-831 (2017)

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Alessia Angiolini

Federico Frenzel

Federico Latorre

Federico Utili

Federico Squartini

 

Other publications of authors with the same name

A post-compiler approach to scratchpad mapping of code., , , , and . CASES, page 259-267. ACM, (2004)Supporting vertical links for 3D networks-on-chip: toward an automated design and analysis flow., , and . Nano-Net, page 15. ICST/ACM, (2007)Quest for the ultimate network-on-chip: the NaNoC project., , , , , , , , and . INA-OCMC@HiPEAC, page 43-46. ACM, (2012)Comparison of a Timing-Error Tolerant Scheme with a Traditional Re-transmission Mechanism for Networks on Chips., , , , , , and . SoC, page 1-4. IEEE, (2006)Tackling the bottleneck of delay tables in 3D ultrasound imaging., , , , , , and . DATE, page 1683-1688. ACM, (2015)A Network Traffic Generator Model for Fast Network-on-Chip Simulation., , , , , and . DATE, page 780-785. IEEE Computer Society, (2005)A vertically integrated and interoperable multi-vendor synthesis flow for predictable noc design in nanoscale technologies., , , , , and . ASP-DAC, page 337-342. IEEE, (2014)Area and Power Modeling Methodologies for Networks-on-Chip., , , , and . Nano-Net, page 1-7. IEEE, (2006)Raspberry Pi driven flow-injection system for electrochemical continuous monitoring platforms., , , , , , and . BioCAS, page 1-4. IEEE, (2017)Single-FPGA, scalable, low-power, and high-quality 3D ultrasound beamformer., , , , , , and . FPL, page 1-2. IEEE, (2016)