( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
A Monolithic-3D SRAM Design with Enhanced Robustness and In-Memory Computation Support.

, , , , , , , , , , , , и . ISLPED, стр. 34:1-34:6. ACM, (2018)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Ajay Kumar Gupta

Ashutosh Kumar Gupta

Manoj Kumar Gupta

Rajender Kumar Gupta

Surender Kumar Gupta

 

Другие публикации лиц с тем же именем

High-performance low-energy STT MRAM based on balanced write scheme., , и . ISLPED, стр. 9-14. ACM, (2012)Device/circuit interactions at 22nm technology node., , и . DAC, стр. 97-102. ACM, (2009)ROBIN: Monolithic-3D SRAM for Enhanced Robustness with In-Memory Computation Support., , , , , , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (7): 2533-2545 (2019)Read-enhanced spin memories augmented by phase transition materials (Invited)., и . MWSCAS, стр. 993-996. IEEE, (2017)Independently-Controlled-Gate FinFET 6T SRAM Cell Design for Leakage Current Reduction and Enhanced Read Access Speed., , , , , , , и . ISVLSI, стр. 296-301. IEEE Computer Society, (2014)Comparative Evaluation of Memory Technologies for Synaptic Crossbar Arrays- Part 2: Design Knobs and DNN Accuracy Trends., , и . CoRR, (2024)FeFET-Based Synaptic Cross-Bar Arrays for Deep Neural Networks: Impact of Ferroelectric Thickness on Device-Circuit Non-Idealities and System Accuracy., , , , , , , , и . DRC, стр. 1-2. IEEE, (2023)2- Transistor Schmitt Trigger based on 2D Electrostrictive Field Effect Transistors., , , и . DRC, стр. 1-2. IEEE, (2018)Insinhts on the DC Characterization of Ferroelectric Field-Effect-Transistors., , , , , и . DRC, стр. 1-2. IEEE, (2018)An area efficient low-voltage 6-T SRAM cell using stacked silicon nanowires., , , и . ICICDT, стр. 117-120. IEEE, (2018)