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A Direct Bond Interconnect 3D Co-Integrated Silicon-Photonic Transceiver in 12nm FinFET with -20.3dBm OMA Sensitivity and 691fJ/bit.

A. Samanta, P. Chang, P. Yan, M. Fu, M. On, A. Kumar, H. Kang, I. Yi, D. Annabattuni, Y. Zhang, D. Scott, R. Patti, Y. Fan, Y. Zhu, S. Palermo, and S. Yoo. OFC, page 1-3. IEEE, (2023)

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Yuanming Shen

Yuanming Zhang

Zhu Dahe

Ming Zhu

Zhiyong Zhu

Other publications of authors with the same name

Analysis on the Application of Computer Aided Instruction in College Physical Education.Y. Zhu. CIPAE, page 455-458. ACM, (2020)Controller-Dynamic-Linearization-Based Model Free Adaptive Control for Discrete-Time Nonlinear Systems.Z. Hou, and Y. Zhu. IEEE Trans. Ind. Informatics, 9 (4): 2301-2309 (2013)A 50Gb/s DAC-Based Multicarrier Polar Transmitter in 22nm FinFET.I. Yi, S. Kaile, Y. Zhu, J. Diaz, S. Hoyos, and S. Palermo. VLSI Technology and Circuits, page 1-2. IEEE, (2023)The Machine Learning for Combinatorial Optimization Competition (ML4CO): Results and Insights.M. Gasse, S. Bowly, Q. Cappart, J. Charfreitag, L. Charlin, D. Chételat, A. Chmiela, J. Dumouchelle, A. Gleixner, A. Kazachkov and 32 other author(s). NeurIPS (Competition and Demos), volume 176 of Proceedings of Machine Learning Research, page 220-231. PMLR, (2021)Data-driven model free adaptive control for a class of interconnected systems.Y. Zhu, F. Qian, Z. Hou, and S. Jin. ASCC, page 1-6. IEEE, (2015)A Direct Bond Interconnect 3D Co-Integrated Silicon-Photonic Transceiver in 12nm FinFET with -20.3dBm OMA Sensitivity and 691fJ/bit.A. Samanta, P. Chang, P. Yan, M. Fu, M. On, A. Kumar, H. Kang, I. Yi, D. Annabattuni, Y. Zhang and 6 other author(s). OFC, page 1-3. IEEE, (2023)A Jitter-Robust 40Gb/s ADC-Based Multicarrier Receiver Front End in 22nm FinFET.Y. Zhu, J. Diaz, S. Kaile, I. Yi, T. Liu, S. Hoyos, and S. Palermo. CICC, page 1-2. IEEE, (2022)A 38GS/s 7b Time-Interleaved Pipelined-SAR ADC with Speed-Enhanced Bootstrapped Switch in 22nm FinFET.Y. Zhu, T. Liu, S. Kaile, S. Kiran, I. Yi, R. Liu, J. Diaz, S. Hoyos, and S. Palermo. CICC, page 1-2. IEEE, (2022)A Sub-1 V Temperature-Insensitive-PSR Bandgap Reference with Complementary Loop Locking.G. Huang, H. Yang, T. Yin, X. Xu, and Y. Zhu. J. Circuits Syst. Comput., 28 (3): 1950047:1-1950047:15 (2019)A -115dB PSRR CMOS bandgap reference with a novel voltage self-regulating technique.Y. Zhu, F. Liu, Y. Yang, G. Huang, T. Yin, and H. Yang. CICC, page 1-4. IEEE, (2014)

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Disambiguation of "Zhu, Yuanming"

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A Direct Bond Interconnect 3D Co-Integrated Silicon-Photonic Transceiver in 12nm FinFET with -20.3dBm OMA Sensitivity and 691fJ/bit.

Please choose a person to relate this publication to

Yuanming Shen

Yuanming Zhang

Zhu Dahe

Ming Zhu

Zhiyong Zhu

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Zhu, Yuanming"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A Direct Bond Interconnect 3D Co-Integrated Silicon-Photonic Transceiver in 12nm FinFET with -20.3dBm OMA Sensitivity and 691fJ/bit.

Please choose a person to relate this publication to

Yuanming Shen

Yuanming Zhang

Zhu Dahe

Ming Zhu

Zhiyong Zhu

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

A Direct Bond Interconnect 3D Co-Integrated Silicon-Photonic Transceiver in 12nm FinFET with -20.3dBm OMA Sensitivity and 691fJ/bit.