Author of the publication

Inter-procedural stacked register allocation for itanium® like architecture.

, , , , , and . ICS, page 215-225. ACM, (2003)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Recursive and Iterative Multithreaded Algorithms for Pricing American Securities., , and . PDPTA, CSREA Press, (2000)Self-Avoiding Walks Over Adaptive Triangular Grids., , and . PPSC, (1999)Efficient Interprocessor Synchronization/Communication on a Dataflow Multiprocessor Architecture., and . ICPP (1), page 220-223. CRC Press, (1992)Minimizing memory requirements in rate-optimal schedules., , and . ASAP, page 75-86. IEEE, (1994)On Parallel Models of Computation.. NPC, volume 4672 of Lecture Notes in Computer Science, page 541. Springer, (2007)A Novel High-Speed Memory Organization for Fine-Grain Multi-Thread Computing., and . PARLE (1), volume 505 of Lecture Notes in Computer Science, page 34-51. Springer, (1991)A Kahn Principle for Networks of Nonmonotonic Real-time Processes., and . PARLE, volume 694 of Lecture Notes in Computer Science, page 209-227. Springer, (1993)Optimizing the LU Factorization for Energy Efficiency on a Many-Core Architecture., , , and . LCPC, volume 8664 of Lecture Notes in Computer Science, page 237-251. Springer, (2013)The Era of Multi-core Chips -A Fresh Look on Software Challenges.. Asia-Pacific Computer Systems Architecture Conference, volume 4186 of Lecture Notes in Computer Science, page 1. Springer, (2006)A code mapping scheme for dataflow software pipelining.. The Kluwer international series in engineering and computer science Kluwer, (1991)