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Reservoir and mixer constrained scheduling for sample preparation on digital microfluidic biochips.

, , , , , , and . ASP-DAC, page 702-707. IEEE, (2017)

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Mechanical strain and temperature aware design methodology for thin-film transistor based pseudo-CMOS logic array., , , , , , , and . ASP-DAC, page 645-650. IEEE, (2018)Columba S: a scalable co-layout design automation tool for microfluidic large-scale integration., , , , , , and . DAC, page 163:1-163:6. ACM, (2018)Practical Functional and Washing Droplet Routing for Cross-Contamination Avoidance in Digital Microfluidic Biochips., , , , and . DAC, page 143:1-143:6. ACM, (2014)Multilevel routing with jumper insertion for antenna avoidance., , and . SoCC, page 63-66. IEEE, (2004)Multilevel routing with antenna avoidance., , and . ISPD, page 34-40. ACM, (2004)Reliability-driven chip-level design for high-frequency digital microfluidic biochips., , and . ISPD, page 133-140. ACM, (2014)Integrated fluidic-chip co-design methodology for digital microfluidic biochips., , and . ISPD, page 49-56. ACM, (2012)Fast Legalization for Standard Cell Placement with Simultaneous Wirelength and Displacement Minimization., and . VLSI-SoC (Selected Papers), volume 373 of IFIP Advances in Information and Communication Technology, page 291-311. Springer, (2010)Special issue on IEEE/ACM System Level Interconnect Prediction (SLIP) Workshop 2016., and . Integr., (2017)CloudLeak: Large-Scale Deep Learning Models Stealing Through Adversarial Examples., , , , , and . NDSS, The Internet Society, (2020)