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6× Higher Restore Speed.

Z. Wang, Y. Liu, A. Lee, F. Su, C. Lo, Z. Yuan, J. Li, C. Lin, W. Chen, H. Chiu, W. Lin, Y. King, C. Lin, P. Amiri, K. Wang, M. Chang, и H. Yang. IEEE J. Solid State Circuits, 52 (10): 2769-2785 (2017)

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Zhe Wang

Zhe Zhang

Zhe Lin

Zhe Sun

Zhe Wang

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CORAL: Coarse-grained reconfigurable architecture for Convolutional Neural Networks.Z. Yuan, Y. Liu, J. Yue, J. Li, и H. Yang. ISLPED, стр. 1-6. IEEE, (2017)The Spread of Multiple Droughts in Different Seasons and Its Dynamic Changes.S. Zhu, W. Huang, X. Luo, J. Guo, и Z. Yuan. Remote. Sens., 15 (15): 3848 (августа 2023)PACA: A Pattern Pruning Algorithm and Channel-Fused High PE Utilization Accelerator for CNNs.J. Wang, S. Yu, Z. Yuan, J. Yue, Z. Yuan, R. Liu, Y. Wang, H. Yang, X. Li, и Y. Liu. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (11): 5043-5056 (2022)Individual rationality and overall fairness in fixed cost allocation: An approach under DEA cross-efficiency evaluation mechanism.J. Chu, W. Su, F. Li, и Z. Yuan. J. Oper. Res. Soc., 74 (3): 992-1007 (марта 2023)Multi-channel precision-sparsity-adapted inter-frame differential data codec for video neural network processor.Y. Yang, Z. Yuan, F. Su, F. Cheng, Z. Yuan, H. Yang, и Y. Liu. ISLPED, стр. 103-108. ACM, (2020)A 2.75-to-75.9TOPS/W Computing-in-Memory NN Processor Supporting Set-Associate Block-Wise Zero Skipping and Ping-Pong CIM with Simultaneous Computation and Weight Updating.J. Yue, X. Feng, Y. He, Y. Huang, Y. Wang, Z. Yuan, M. Zhan, J. Liu, J. Su, Y. Chung и 7 other автор(ы). ISSCC, стр. 238-240. IEEE, (2021)RL Based Network Accelerator Compiler for Joint Compression Hyper-Parameter Search.X. Feng, J. Yue, Z. Yuan, H. Yang, и Y. Liu. ISCAS, стр. 1-5. IEEE, (2020)Index-free triangle-based graph local clustering.Z. Yuan, Z. Wei, F. Lv, и J. Wen. Frontiers Comput. Sci., 18 (3): 183404 (июня 2024)A Learning-Based Framework for Low Bit-Rate Image and Video Coding.H. Xiong, Z. Yuan, и Y. Xu. PCM, том 5879 из Lecture Notes in Computer Science, стр. 232-244. Springer, (2009)Sticker: A 0.41-62.1 TOPS/W 8Bit Neural Network Processor with Multi-Sparsity Compatible Convolution Arrays and Online Tuning Acceleration for Fully Connected Layers.Z. Yuan, J. Yue, H. Yang, Z. Wang, J. Li, Y. Yang, Q. Guo, X. Li, M. Chang, H. Yang и 1 other автор(ы). VLSI Circuits, стр. 33-34. IEEE, (2018)

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Please choose a person to relate this publication to

Zhe Wang

Zhe Zhang

Zhe Lin

Zhe Sun

Zhe Wang

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