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Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells.

W. Zhao, J. Portal, W. Kang, M. Moreau, Y. Zhang, H. Aziza, J. Klein, Z. Wang, D. Querlioz, D. Deleruyelle, M. Bocquet, D. Ravelosona, C. Muller, and C. Chappert. J. Parallel Distributed Comput., 74 (6): 2484-2496 (2014)

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Cynthia Moreau

Patrick Moreau

Dorothee Moreau

Erwan Moreau

Dirk Moreau

Other publications of authors with the same name

A Capacitor-Less CMOS Neuron Circuit for Neuromemristive Networks.H. Aziza, M. Moreau, A. Pérez, A. Virazel, and P. Girard. NEWCAS, page 1-4. IEEE, (2019)Multilevel operation in oxide based resistive RAM with SET voltage modulation.H. Aziza, H. Ayari, S. Onkaraiah, M. Moreau, J. Portal, and M. Bocquet. DTIS, page 1-5. IEEE, (2016)An Augmented OxRAM Synapse for Spiking Neural Network (SNN) Circuits.H. Aziza, H. Bazzi, J. Postel-Pellerin, P. Canet, M. Moreau, and A. Harb. DTIS, page 1-5. IEEE, (2019)Comparison between Lagrangian and mesoscopic Eulerian modelling approaches for inertial particles suspended in decaying isotropic turbulence.A. Kaufmann, M. Moreau, O. Simonin, and J. Hélie. J. Comput. Phys., 227 (13): 6448-6472 (2008)Design of Hybrid CMOS Non-Volatile SRAM Cells in 130nm RRAM Technology.H. Bazzi, A. Harb, H. Aziza, and M. Moreau. ICM, page 228-231. IEEE, (2018)Single-ended sense amplifier robustness evaluation for OxRRAM technology.H. Aziza, M. Bocquet, M. Moreau, and J. Portal. IDT, page 1-5. IEEE, (2013)High density emerging resistive memories: What are the limits?A. Levisse, B. Giraud, J. Noël, M. Moreau, and J. Portal. LASCAS, page 1-4. IEEE, (2017)Capacitor based SneakPath compensation circuit for transistor-less ReRAM architectures.A. Levisse, B. Giraud, J. Noel, M. Moreau, and J. Portal. NANOARCH, page 7-12. ACM, (2016)Storage Class Memory with Computing Row Buffer: A Design Space Exploration.V. Egloff, J. Noel, M. Kooli, B. Giraud, L. Ciampolini, R. Gauchi, C. Tortolero, E. Guthmuller, M. Moreau, and J. Portal. DATE, page 1-6. IEEE, (2021)Switching Event Detection and Self-Termination Programming Circuit for Energy Efficient ReRAM Memory Arrays.M. Alayan, E. Muhr, A. Levisse, M. Bocquet, M. Moreau, E. Nowak, G. Molas, E. Vianello, and J. Portal. IEEE Trans. Circuits Syst. II Express Briefs, 66-II (5): 748-752 (2019)

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Disambiguation of "Moreau, Mathieu"

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Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells.

Please choose a person to relate this publication to

Cynthia Moreau

Patrick Moreau

Dorothee Moreau

Erwan Moreau

Dirk Moreau

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Moreau, Mathieu"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells.

Please choose a person to relate this publication to

Cynthia Moreau

Patrick Moreau

Dorothee Moreau

Erwan Moreau

Dirk Moreau

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells.