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Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs.

A. Amid, D. Biancolin, A. Gonzalez, D. Grubb, S. Karandikar, H. Liew, A. Magyar, H. Mao, A. Ou, N. Pemberton, P. Rigge, C. Schmidt, J. Wright, J. Zhao, Y. Shao, K. Asanovic, and B. Nikolic. IEEE Micro, 40 (4): 10-21 (2020)

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Howard Nelson

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Howard Li

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A 0.37mm2 LTE/Wi-Fi compatible, memory-based, runtime-reconfigurable 2n3m5k FFT accelerator integrated with a RISC-V core in 16nm FinFET.A. Wang, B. Richards, D. Dabbelt, H. Mao, S. Bailey, J. Han, E. Chang, J. Dunn, E. Alon, and B. Nikolic. A-SSCC, page 305-308. IEEE, (2017)FirePerf: FPGA-Accelerated Full-System Hardware/Software Performance Profiling and Co-Design.S. Karandikar, A. Ou, A. Amid, H. Mao, R. Katz, B. Nikolic, and K. Asanovic. ASPLOS, page 715-731. ACM, (2020)ASPLOS 2020 was canceled because of COVID-19..Vector Processors for Energy-Efficient Embedded Systems.D. Dabbelt, C. Schmidt, E. Love, H. Mao, S. Karandikar, and K. Asanovic. MES@ISCA, page 10-16. ACM, (2016)A Generated Multirate Signal Analysis RISC-V SoC in 16nm FinFET.S. Bailey, J. Han, P. Rigge, R. Lin, E. Chang, H. Mao, Z. Wang, C. Markley, A. Izraelevitz, A. Wang and 21 other author(s). A-SSCC, page 285-288. IEEE, (2018)Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs.A. Amid, D. Biancolin, A. Gonzalez, D. Grubb, S. Karandikar, H. Liew, A. Magyar, H. Mao, A. Ou, N. Pemberton and 7 other author(s). IEEE Micro, 40 (4): 10-21 (2020)Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration.H. Genc, S. Kim, A. Amid, A. Haj-Ali, V. Iyer, P. Prakash, J. Zhao, D. Grubb, H. Liew, H. Mao and 9 other author(s). DAC, page 769-774. IEEE, (2021)Invited: Chipyard - An Integrated SoC Research and Implementation Environment.A. Amid, D. Biancolin, A. Gonzalez, D. Grubb, S. Karandikar, H. Liew, A. Magyar, H. Mao, A. Ou, N. Pemberton and 8 other author(s). DAC, page 1-6. IEEE, (2020)FPGA Accelerated INDEL Realignment in the Cloud.L. Wu, D. Bruns-Smith, F. Nothaft, Q. Huang, S. Karandikar, J. Le, A. Lin, H. Mao, B. Sweeney, K. Asanovic and 2 other author(s). HPCA, page 277-290. IEEE, (2019)FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud.S. Karandikar, H. Mao, D. Kim, D. Biancolin, A. Amid, D. Lee, N. Pemberton, E. Amaro, C. Schmidt, A. Chopra and 6 other author(s). ISCA, page 29-42. IEEE Computer Society, (2018)

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Disambiguation of "Mao, Howard"

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Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs.

Please choose a person to relate this publication to

Howard Nelson

Howard Foster

Howard Li

Mary Howard

Howard Loewen

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Mao, Howard"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs.

Please choose a person to relate this publication to

Howard Nelson

Howard Foster

Howard Li

Mary Howard

Howard Loewen

Other publications of authors with the same name

Disambiguation

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Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs.