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Analog-to-digital converter based on single-electron tunneling transistors., , , и . IEEE Trans. Very Large Scale Integr. Syst., 12 (11): 1209-1213 (2004)Design of a high voltage stimulator chip for a stroke rehabilitation system., , , , , , , и . EMBC, стр. 834-837. IEEE, (2013)Design and Implementation of Flexible Dual-Mode Soft-Output MIMO Detector With Channel Preprocessing., , , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (11): 2706-2717 (2015)A Hierarchical Communication Algorithm for Distributed Deep Learning Training., , , , , , и . MWSCAS, стр. 526-530. IEEE, (2023)Reducing Memory Access Conflicts with Loop Transformation and Data Reuse on Coarse-grained Reconfigurable Architecture., , , , , и . DATE, стр. 124-129. IEEE, (2021)Pipeline Balancing for Integrated Mapping in High Performance Spatial Programmable Architecture., , , , , , , и . FPL, стр. 116-122. IEEE, (2023)A CPU-FPGA Based Heterogeneous Accelerator for RepVGG., , , , , , и . ASICON, стр. 1-4. IEEE, (2021)Decoupling the Multi-Rate Dataflow Execution in Coarse-Grained Reconfigurable Array., , , , , , , и . ISCAS, стр. 1-5. IEEE, (2020)Subgraph Decoupling and Rescheduling for Increased Utilization in CGRA Architecture., , , , , , и . DATE, стр. 1394-1399. IEEE, (2021)Boosting ReRAM-based DNN by Row Activation Oversubscription., , , , и . ASP-DAC, стр. 604-609. IEEE, (2022)