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Disambiguation of "Jing, Naifeng"

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Subgraph Decoupling and Rescheduling for Increased Utilization in CGRA Architecture.

, , , , , , and . DATE, page 1394-1399. IEEE, (2021)

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Naifeng Liu

Yuanyuan Jing

Guangmei Jing

Hao Jing

Duohui Jing

 

Other publications of authors with the same name

Resource constrained mapping of data flow graphs onto coarse-grained reconfigurable array., , and . SoCC, page 260-265. IEEE, (2010)Contention and energy aware mapping for real-time applications on Network-on-Chip., , , and . ISOCC, page 72-76. IEEE, (2012)A general statistical estimation for application mapping in Network-on-Chip., , and . VLSI-SoC, page 172-175. IEEE, (2011)Bank Stealing for a Compact and Efficient Register File Architecture in GPGPU., , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (2): 520-533 (2017)VR-DANN: Real-Time Video Recognition via Decoder-Assisted Neural Network Acceleration., , , , , and . MICRO, page 698-710. IEEE, (2020)Scale Adaptive Proposal Network for Object Detection in Remote Sensing Images., , , , and . IEEE Geosci. Remote. Sens. Lett., 16 (6): 864-868 (2019)Redundancy based Interconnect Duplication to Mitigate Soft Errors in SRAM-based FPGAs., , , , , and . ICCAD, page 764-769. IEEE, (2015)On Quality Trade-off Control for Approximate Computing Using Iterative Training., , , , , , and . DAC, page 52:1-52:6. ACM, (2017)IPF: In-Place X-Filling to Mitigate Soft Errors in SRAM-Based FPGAs., , , , and . FPL, page 482-485. IEEE Computer Society, (2011)CMC: Video Transformer Acceleration via CODEC Assisted Matrix Condensing., , , , and . ASPLOS (2), page 201-215. ACM, (2024)