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Disambiguation of "Gu, Shouzhen"

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Optimizing Data Placement for Hybrid SPM with SRAM and Racetrack Memory.

, , , , and . ICCD, page 409-416. IEEE, (2020)

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Xuewu Gu

Wei Gu

Xiaogang Gu

Hyosong Gu

Jie Gu

 

Other publications of authors with the same name

Optimizing Data Placement for Hybrid SPM with SRAM and Racetrack Memory., , , , and . ICCD, page 409-416. IEEE, (2020)A Time, Energy, and Area Efficient Domain Wall Memory-Based SPM for Embedded Systems., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (12): 2008-2017 (2016)A space-based wear leveling for PCM-based embedded systems., , , , , and . RTCSA, page 145-148. IEEE Computer Society, (2013)A space allocation and reuse strategy for PCM-based embedded systems., , , , , and . J. Syst. Archit., 60 (8): 655-667 (2014)Area and performance co-optimization for domain wall memory in application-specific embedded systems., , , , and . DAC, page 20:1-20:6. ACM, (2015)An Efficient Racetrack Memory-Based Processing-in-Memory Architecture for Convolutional Neural Networks., , , , , , and . ISPA/IUCC, page 383-390. IEEE, (2017)Rapid Recovery of Program Execution Under Power Failures for Embedded Systems with NVM., , , , and . CoRR, (2022)Performance optimization for parallel systems with shared DWM via retiming, loop scheduling, and data placement., , , , and . J. Syst. Archit., (2021)Work-in-Progress: Cooperative MLP-Mixer Networks Inference On Heterogeneous Edge Devices through Partition and Fusion., , and . CASES, page 29-30. IEEE, (2022)Relaxed Placement: Minimizing Shift Operations for Racetrack Memory in Hybrid SPM., , , , , and . ACM Great Lakes Symposium on VLSI, page 129-134. ACM, (2021)