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A space-based wear leveling for PCM-based embedded systems.

, , , , , and . RTCSA, page 145-148. IEEE Computer Society, (2013)

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General loop fusion technique for nested loops considering timing and code size., , , and . CASES, page 190-201. ACM, (2004)Performance optimization of multiple memory architectures for DSP., , and . ISCAS (5), page 469-472. IEEE, (2002)Optimal scheduling to minimize non-volatile memory access time with hardware cache., , , , and . VLSI-SoC, page 131-136. IEEE, (2010)An Integrated Framework of Design Optimization and Space Minimization for DSP applications., , and . ISCAS (5), page 601-604. IEEE, (2003)Efficient task assignment and scheduling for MPSoC DSPS with VS-SPM considering concurrent accesses through data allocation., , , , and . ICASSP, page 2615-2619. IEEE, (2013)Towards energy efficient hybrid on-chip Scratch Pad Memory with non-volatile memory., , , , and . DATE, page 746-751. IEEE, (2011)Timing Optimization of Nested Loops Considering Code Size for DSP Applications., , and . ICPP, page 475-482. IEEE Computer Society, (2004)Towards Real-Time and Temporal Information Services in Vehicular Networks via Multi-Objective Optimization., , , , , and . LCN, page 671-679. IEEE Computer Society, (2016)Optimal Data Allocation for Scratch-Pad Memory on Embedded Multi-core Systems., , , , and . ICPP, page 464-471. IEEE Computer Society, (2011)Minimizing write activities to non-volatile memory via scheduling and recomputation., , , , and . SASP, page 101-106. IEEE Computer Society, (2010)