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Device/circuit interactions at 22nm technology node., , и . DAC, стр. 97-102. ACM, (2009)High-performance low-energy STT MRAM based on balanced write scheme., , и . ISLPED, стр. 9-14. ACM, (2012)ROBIN: Monolithic-3D SRAM for Enhanced Robustness with In-Memory Computation Support., , , , , , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (7): 2533-2545 (2019)Read-enhanced spin memories augmented by phase transition materials (Invited)., и . MWSCAS, стр. 993-996. IEEE, (2017)Independently-Controlled-Gate FinFET 6T SRAM Cell Design for Leakage Current Reduction and Enhanced Read Access Speed., , , , , , , и . ISVLSI, стр. 296-301. IEEE Computer Society, (2014)Valley-Coupled-Spintronic Non-Volatile Memories with Compute-In-Memory Support., , , , , , , , и . CoRR, (2019)An area efficient low-voltage 6-T SRAM cell using stacked silicon nanowires., , , и . ICICDT, стр. 117-120. IEEE, (2018)Exploiting ferroelectric FETs for low-power non-volatile logic-in-memory circuits., , , , , , и . ICCAD, стр. 121. ACM, (2016)FeFET-Based Synaptic Cross-Bar Arrays for Deep Neural Networks: Impact of Ferroelectric Thickness on Device-Circuit Non-Idealities and System Accuracy., , , , , , , , и . DRC, стр. 1-2. IEEE, (2023)2- Transistor Schmitt Trigger based on 2D Electrostrictive Field Effect Transistors., , , и . DRC, стр. 1-2. IEEE, (2018)