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Disambiguation of "Manasi, Susmita Dey"

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VeriGOOD-ML: An Open-Source Flow for Automated ML Hardware Synthesis.

, , , , , , , , , , , , , , , and . ICCAD, page 1-7. IEEE, (2021)

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Manasi Dutt

Susmita Arp

Joseph Dey

Horst Dey

Pradip Dey

 

Other publications of authors with the same name

SeFAct: selective feature activation and early classification for CNNs., , , , , and . ASP-DAC, page 487-492. ACM, (2019)A Comparative Study of Si/Ge and GaSb/InAs Tunnel FET-Based Cellular Neural Network., and . ISVLSI, page 685-690. IEEE Computer Society, (2016)VeriGOOD-ML: An Open-Source Flow for Automated ML Hardware Synthesis., , , , , , , , , and 6 other author(s). ICCAD, page 1-7. IEEE, (2021)GNNIE: GNN Inference Engine with Load-balancing and Graph-Specific Caching., , , and . CoRR, (2021)Reusing GEMM Hardware for Efficient Execution of Depthwise Separable Convolution on ASIC-Based DNN Accelerators., , , , , , and . ASP-DAC, page 475-482. ACM, (2023)Gate/source-overlapped heterojunction Tunnel FET-based LAMSTAR neural network and its Application to EEG Signal Classification., and . IJCNN, page 955-962. IEEE, (2016)Physically Accurate Learning-based Performance Prediction of Hardware-accelerated ML Algorithms., , , , , , , , , and 1 other author(s). MLCAD, page 119-126. ACM / IEEE, (2022)SeFAct2: Selective Feature Activation for Energy-Efficient CNNs Using Optimized Thresholds., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (7): 1423-1436 (2021)Straintronic magneto-tunneling-junction based ternary content addressable memory., , , , and . CoRR, (2016)Fast and Efficient Constraint Evaluation of Analog Layout Using Machine Learning Models., , , , , , , , , and . ASP-DAC, page 158-163. ACM, (2021)