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Low power magnetic flip-flop based on checkpointing and self-enable mechanism., , , , and . NEWCAS, page 1-4. IEEE, (2013)Emerging hybrid logic circuits based on non-volatile magnetic memories., , , , , and . NEWCAS, page 1-4. IEEE, (2013)Fully Single Event Double Node Upset Tolerant Design for Magnetic Random Access Memory., , , , , , , , , and 1 other author(s). ISCAS, page 1-5. IEEE, (2021)TOTAL: Multi-Corners Timing Optimization Based on Transfer and Active Learning., , , , , , and . DAC, page 1-6. IEEE, (2023)Spintronics for low-power computing., , , , , , , and . DATE, page 1-6. European Design and Automation Association, (2014)Emerging Neuromorphic Computing Paradigms Exploring Magnetic Skyrmions., , , , , , and . ISVLSI, page 539-544. IEEE Computer Society, (2018)Read disturbance issue for nanoscale STT-MRAM., , , , and . NVMSA, page 1-6. IEEE, (2015)Recent progresses of STT memory design and applications., , , , , and . ASICON, page 1-4. IEEE, (2015)Reliability Emphasized MTJ/CMOS Hybrid Circuit Towards Ultra-Low Power., , , , , , and . DCIS, page 1-5. IEEE, (2018)Nonvolatile radiation hardened DICE latch., , , , , and . NVMTS, page 1-4. IEEE, (2015)