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Disambiguation of "Ren, Junyan"

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A 91.0-dB SFDR Single-Coarse Dual-Fine Pipelined-SAR ADC With Split-Based Background Calibration in 28-nm CMOS.

, , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 68 (2): 641-654 (2021)

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Junyan Zhu

Jianxin Ren

Hongming Ren

Zhongliang Ren

Ling Ren

 

Other publications of authors with the same name

Class-AB CMOS buffer with floating class-AB control., , and . ASICON, page 120-123. IEEE, (2011)A High-Speed High-Resolution Low-Distortion CMOS Bootstrapped Switch., , , , and . ISCAS, page 1721-1724. IEEE, (2007)Implementation of Folded Sliding Block Viterbi Decoders for MB-OFDM UWB Communication System., , , and . ISCAS, page 2574-2577. IEEE, (2007)A current-mode 6-9GHz UWB transmitter with output power flattening technique., , , , and . ISCAS, page 329-332. IEEE, (2010)A 4-channel 8-bit 650-MSample/s DAC with interpolation filter for embedded application., , , , , , , and . ASICON, page 492-495. IEEE, (2011)No zero padded sparse matrix-vector multiplication on FPGAs., , , and . FPT, page 290-291. IEEE, (2014)A 131.5GHz, -84dBm sensitivity super-regenerative receiver by zero-phase-shifter coupled oscillator network in 65nm CMOS., , , , and . ESSCIRC, page 187-190. IEEE, (2014)A 12bit asynchronous SAR-incremental sub-range ADC., , , , and . ASICON, page 835-838. IEEE, (2017)A proved dither-injection method for memory effect in double sampling pipelined ADC., , , , and . ASICON, page 754-757. IEEE, (2017)A 36-40 GHz VCO with bonding inductors for millimeter wave 5G Communication., , , , , , and . ASICON, page 1-4. IEEE, (2019)