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A Method to Detect Bit Flips in a Soft-Error Resilient TCAM.

, , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (6): 1185-1196 (2018)

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Maximally Asymmetric Multiple-Valued Functions., and . ISMVL, page 188-193. IEEE, (2019)Comparison of Decision Diagrams for Multiple-Output Logic Functions., , and . IWLS, page 379-384. (2002)Decision Diagrams for Discrete Functions: Classification and Unified Interpretation., and . ASP-DAC, page 439-446. IEEE, (1998)BDD representation for incompletely specifiedvmultiple-output logic functions and its applications to functional decomposition., and . DAC, page 373-378. ACM, (2005)Cascade Realization of 3-Input 3-Output Conservative Logic Circuits., and . IEEE Trans. Computers, 27 (3): 214-221 (1978)A Systematic Design Method for Two-Variable Numeric Function Generators Using Multiple-Valued Decision Diagrams., , and . IEICE Trans. Inf. Syst., 93-D (8): 2059-2067 (2010)A Balanced Decision Tree Based Heuristic for Linear Decomposition of Index Generation Functions., , and . IEICE Trans. Inf. Syst., 100-D (8): 1583-1591 (2017)Remarks on the Design of First Digital Computers in Japan - Contributions of Yasuo Komamiya., , , and . EUROCAST (1), volume 12013 of Lecture Notes in Computer Science, page 123-130. Springer, (2019)Realization of Multi-Terminal Universal Interconnection Networks Using Contact Switches., , , and . IEICE Trans. Inf. Syst., 104-D (8): 1068-1075 (2021)A Regular Expression Matching Circuit Based on a Decomposed Automaton., , and . ARC, volume 6578 of Lecture Notes in Computer Science, page 16-28. Springer, (2011)