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System-Level Benchmarking of Chiplet-based IMC Architectures for Deep Neural Network Acceleration.

G. Krishnan, S. Mandal, C. Chakrabarti, J. Seo, Ü. Ogras, and Y. Cao. ASICON, page 1-4. IEEE, (2021)

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Avradip Mandal

Sunand Sumithra

Sumit Khanra

Sumit Parmar

Soumyajit Mandal

Other publications of authors with the same name

Impact of On-chip Interconnect on In-memory Acceleration of Deep Neural Networks.G. Krishnan, S. Mandal, C. Chakrabarti, J. Seo, Ü. Ogras, and Y. Cao. ACM J. Emerg. Technol. Comput. Syst., 18 (2): 34:1-34:22 (2022)Interconnect-Aware Area and Energy Optimization for In-Memory Acceleration of DNNs.G. Krishnan, S. Mandal, C. Chakrabarti, J. sun Seo, Ü. Ogras, and Y. Cao. IEEE Des. Test, 37 (6): 79-87 (2020)Achieving Datacenter-scale Performance through Chiplet-based Manycore Architectures.H. Sharma, S. Mandal, J. Doppa, Ü. Ogras, and P. Pande. DATE, page 1-6. IEEE, (2023)A Lightweight Congestion Control Technique for NoCs with Deflection Routing.S. Narayana, S. Mandal, R. Ayoub, M. Kishinevsky, and Ü. Ogras. DATE, page 1-2. IEEE, (2023)Online Adaptive Learning for Runtime Resource Management of Heterogeneous SoCs.S. Mandal, Ü. Ogras, J. Doppa, R. Ayoub, M. Kishinevsky, and P. Pande. DAC, page 1-6. IEEE, (2020)System-Level Benchmarking of Chiplet-based IMC Architectures for Deep Neural Network Acceleration.G. Krishnan, S. Mandal, C. Chakrabarti, J. Seo, Ü. Ogras, and Y. Cao. ASICON, page 1-4. IEEE, (2021)Analytical modeling of NoCs for fast simulation and design exploration (invited).R. Ayoub, M. Kishinevsky, S. Mandal, and Ü. Ogras. SLIP, page 8. ACM, (2020)Enabling Software-Defined RF Convergence with a Novel Coarse-Scale Heterogeneous Processor.D. Bliss, T. Ajayi, A. Akoglu, I. Aliyev, T. Basaklar, L. Belayneh, D. Blaauw, J. Brunhaver, C. Chakrabarti, L. Chang and 33 other author(s). ISCAS, page 443-447. IEEE, (2022)DISHA: Low-Energy Sparse Transformer at Edge for Outdoor Navigation for the Visually Impaired Individuals.P. Nagil, and S. Mandal. CoRR, (2024)CANNON: Communication-Aware Sparse Neural Network Optimization.A. Goksoy, G. Li, S. Mandal, Ü. Ogras, and R. Marculescu. IEEE Trans. Emerg. Top. Comput., 11 (4): 882-894 (October 2023)

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Disambiguation of "Mandal, Sumit K."

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System-Level Benchmarking of Chiplet-based IMC Architectures for Deep Neural Network Acceleration.

Please choose a person to relate this publication to

Avradip Mandal

Sunand Sumithra

Sumit Khanra

Sumit Parmar

Soumyajit Mandal

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Mandal, Sumit K."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML System-Level Benchmarking of Chiplet-based IMC Architectures for Deep Neural Network Acceleration.

Please choose a person to relate this publication to

Avradip Mandal

Sunand Sumithra

Sumit Khanra

Sumit Parmar

Soumyajit Mandal

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

System-Level Benchmarking of Chiplet-based IMC Architectures for Deep Neural Network Acceleration.