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Leveraging Machine Learning for Gate-level Timing Estimation Using Current Source Models and Effective Capacitance.

, , , , и . ACM Great Lakes Symposium on VLSI, стр. 77-83. ACM, (2022)

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Dimitrios Tourpalis

Dimitrios Papanastasiou

Dimitrios Moulalis

Dimitrios Tassiopoulos

Dimitrios Dadaliaris

 

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