Author of the publication

Increasing the effectiveness of directory caches by deactivating coherence for private memory blocks.

, , , , and . ISCA, page 93-104. ACM, (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Turning Centralized Coherence and Distributed Critical-Section Execution on their Head: A New Approach for Scalable Distributed Shared Memory., , , , and . HPDC, page 3-14. ACM, (2015)Optimization of a Linked Cache Coherence Protocol for Scalable Manycore Coherence., , and . ARCS, volume 9637 of Lecture Notes in Computer Science, page 100-112. Springer, (2016)ECONO: Express coherence notifications for efficient cache coherency in many-core CMPs., , , and . ICSAMOS, page 237-244. IEEE, (2013)Filter caching for free: the untapped potential of the store-buffer., , , and . ISCA, page 436-448. ACM, (2019)POSTER: Efficient Self-Invalidation/Self-Downgrade for Critical Sections with Relaxed Semantics., , , and . PACT, page 433-434. ACM, (2016)Non-Speculative Load-Load Reordering in TSO., , , and . ISCA, page 187-200. ACM, (2017)Splash-4: A Modern Benchmark Suite with Lock-Free Constructs., , , and . IISWC, page 51-64. IEEE, (2022)CELLO: Compiler-Assisted Efficient Load-Load Ordering in Data-Race-Free Regions., , , , and . PACT, page 1-13. IEEE, (2023)Analysis of the Interactions Between ILP and TLP With Hardware Transactional Memory., , , , and . PDP, page 157-164. IEEE, (2022)A Novel Lightweight Directory Architecture for Scalable Shared-Memory Multiprocessors., , and . Euro-Par, volume 3648 of Lecture Notes in Computer Science, page 582-591. Springer, (2005)