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Improving post-silicon error detection with topological selection of trace signals., , , , и . VLSI-SoC, стр. 1-6. IEEE, (2017)A Technique for Electrical Error Localization with Learning Methods During Post-silicon Debugging., , и . IGSC, стр. 1-8. IEEE, (2018)Black-Hat High-Level Synthesis: Myth or Reality?, , , и . IEEE Trans. Very Large Scale Integr. Syst., 27 (4): 913-926 (2019)Efficient Trace Signal Selection for Post Silicon Validation and Debug., и . VLSI Design, стр. 352-357. IEEE Computer Society, (2011)Can Overclocking Detect Hardware Trojans?, , , и . ISCAS, стр. 1-5. IEEE, (2021)PREEMPT: PReempting Malware by Examining Embedded Processor Traces., , , и . DAC, стр. 166. ACM, (2019)Bottlenecks in Secure Adoption of Deep Neural Networks in Safety-Critical Applications., , и . MWSCAS, стр. 801-805. IEEE, (2023)Towards High-Level Synthesis of Quantum Circuits., , и . DATE, стр. 1-6. IEEE, (2023)COPPTCHA: COPPA Tracking by Checking Hardware-Level Activity., , , и . IEEE Trans. Inf. Forensics Secur., (2020)Two Sides of the Same Coin: Boons and Banes of Machine Learning in Hardware Security., , , , , , , , и . IEEE J. Emerg. Sel. Topics Circuits Syst., 11 (2): 228-251 (2021)