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An FPGA-Accelerated Fully Nonvolatile Microcontroller Unit for Sensor-Node Applications in 40nm CMOS/MTJ-Hybrid Technology Achieving 47.14μW Operation at 200MHz.

, , , , , , , , , , , , , , , and . ISSCC, page 202-204. IEEE, (2019)

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Implementation of a Standby-Power-Free CAM Based on Complementary Ferroelectric-Capacitor Logic., , , , and . ASP-DAC, page 116-117. IEEE Computer Society, (2007)Design of an Energy-Efficient True Random Number Generator Based on Triple Read-Write Data-Stream Multiplexing of MTJ Devices., , , , and . NEWCAS, page 283-286. IEEE, (2020)Multiple-Valued Content-Addressable Memory Using Metal-Ferroelectric-Semiconductor FETs., , and . ISMVL, page 30-35. IEEE Computer Society, (1999)Asynchronous Multiple-Valued VLSI System Based on Dual-Rail Current-Mode Differential Logic., , and . ISMVL, page 134-139. IEEE Computer Society, (1998)A Multiple-Valued Content-Addressable Memory Using Logic-Value Conversion and Threshold Functions., , and . ISMVL, page 170-175. IEEE Computer Society, (1993)Design of a High-Density Multiple-Valued Content-Addressable Memory Based on Floating-Gate MOS Devices., and . ISMVL, page 18-23. IEEE Computer Society, (1990)Dual-Rail Multiple-Valued Current-Mode VLSI with Biasing Current Sources., , and . ISMVL, page 21-26. IEEE Computer Society, (2001)High-Speed Timing Verification Scheme Using Delay Tables for a Large-Scaled Multiple-Valued Current-Mode Circuit., , and . ISMVL, page 70-75. IEEE Computer Society, (2008)One-Color Two-Phase Asynchronous Communication Links Based on Multiple-Valued Simultaneous Control., , and . ISMVL, page 211-216. IEEE Computer Society, (2010)Complementary Multiple-Valued Encoding Scheme for Interconnect-Fault-Resilient Bidirectional Asynchronous Links., , and . ISMVL, page 236-241. IEEE Computer Society, (2011)