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Disambiguation of "Rajendran, Bipin"

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Pulsed laser annealing: A scalable and practical technology for monolithic 3D IC.

, , , and . 3DIC, page 1-5. IEEE, (2013)

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Chitra Rajendran

Vidyalakshmi Rajendran

Bipin Juthani

Lawrence Rajendran

Ranjithkumar Rajendran

 

Other publications of authors with the same name

Coding for sensing in Content Addressable Memories., , , and . ISIT, page 1923-1927. IEEE, (2010)Pulsed laser annealing: A scalable and practical technology for monolithic 3D IC., , , and . 3DIC, page 1-5. IEEE, (2013)Neuromorphic Hardware Accelerator for SNN Inference based on STT-RAM Crossbar Arrays., , , , and . ICECS, page 438-441. IEEE, (2019)Bayesian Inference on Binary Spiking Networks Leveraging Nanoscale Device Stochasticity., , , , and . ISCAS, page 1-5. IEEE, (2023)Hybrid In-Memory Computing Architecture for the Training of Deep Neural Networks., , , and . ISCAS, page 1-5. IEEE, (2021)Efficient scrub mechanisms for error-prone emerging memories., , , , , and . HPCA, page 15-26. IEEE Computer Society, (2012)NormAD - Normalized Approximate Descent based supervised learning rule for spiking neurons., and . IJCNN, page 1-8. IEEE, (2015)C. elegans chemotaxis inspired neuromorphic circuit for contour tracking and obstacle avoidance., and . IJCNN, page 1-8. IEEE, (2015)Arithmetic computing via rate coding in neural circuits with spike-triggered adaptive synapses., and . IJCNN, page 1-8. IEEE, (2015)Training Multilayer Spiking Neural Networks using NormAD based Spatio-Temporal Error Backpropagation., and . CoRR, (2018)