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Multi-Project System-on-Chip (MP-SoC): A Novel Test Vehicle for SoC Silicon Prototyping.

C. Huang, K. Lee, C. Yang, W. Hu, S. Wang, J. Chen, C. Chen, L. Van, C. Wu, W. Tsai, and J. Jou. SoCC, page 137-140. IEEE, (2006)

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Jing Yang

Jing-Mao Yang

Nabil Al-Jou Jou

Yuanyuan Jing

Guangmei Jing

Other publications of authors with the same name

Multi-Project System-on-Chip (MP-SoC): A Novel Test Vehicle for SoC Silicon Prototyping.C. Huang, K. Lee, C. Yang, W. Hu, S. Wang, J. Chen, C. Chen, L. Van, C. Wu, W. Tsai and 1 other author(s). SoCC, page 137-140. IEEE, (2006)An efficient logic extraction algorithm using partitioning and circuit encoding.L. Huang, T. Jiang, J. Jou, and H. Huang. ISCAS (5), page 249-252. IEEE, (2004)A read-write aware DRAM scheduling for power reduction in multi-core systems.C. Lai, G. Pan, H. Kuo, and J. Jou. ASP-DAC, page 604-609. IEEE, (2014)A power driven two-level logic optimizer.J. Tseng, and J. Jou. ASP-DAC, page 113-116. IEEE, (1997)An observability measure to enhance statement coverage metric for proper evaluation of verification completeness.T. Jiang, C. Liu, and J. Jou. ASP-DAC, page 323-326. ACM Press, (2005)A real-time and bandwidth guaranteed arbitration algorithm for SoC bus communication.C. Chen, G. Lee, J. Huang, and J. Jou. ASP-DAC, page 600-605. IEEE, (2006)An automorphic approach to verification pattern generation for SoC design verification using port-order fault model.C. Wang, S. Tung, and J. Jou. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 21 (10): 1225-1232 (2002)Expandable MDC-based FFT architecture and its generator for high-performance applications.B. Lin, Y. Wang, J. Huang, and J. Jou. SoCC, page 188-192. IEEE, (2010)1st-Order to 2nd-Order Threshold Logic Gate Transformation with an Enhanced ILP-based Identification Method.L. Zheng, H. Chang, Y. Chen, and J. Jou. ASP-DAC, page 469-474. ACM, (2021)OPAM: an efficient output phase assignment for multilevel logic minimization.C. Wey, S. Chang, and J. Jou. ICCD, page 270-273. IEEE, (1989)

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Disambiguation of "Jou, Jing-Yang"

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Multi-Project System-on-Chip (MP-SoC): A Novel Test Vehicle for SoC Silicon Prototyping.

Please choose a person to relate this publication to

Jing Yang

Jing-Mao Yang

Nabil Al-Jou Jou

Yuanyuan Jing

Guangmei Jing

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Jou, Jing-Yang"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Multi-Project System-on-Chip (MP-SoC): A Novel Test Vehicle for SoC Silicon Prototyping.

Please choose a person to relate this publication to

Jing Yang

Jing-Mao Yang

Nabil Al-Jou Jou

Yuanyuan Jing

Guangmei Jing

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Multi-Project System-on-Chip (MP-SoC): A Novel Test Vehicle for SoC Silicon Prototyping.