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Multi-Project System-on-Chip (MP-SoC): A Novel Test Vehicle for SoC Silicon Prototyping.

C. Huang, K. Lee, C. Yang, W. Hu, S. Wang, J. Chen, C. Chen, L. Van, C. Wu, W. Tsai, and J. Jou. SoCC, page 137-140. IEEE, (2006)

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Chi Chen

Chi-yün Chen

Chi-Siang Chen

Liang-chi Chen

Chi-Rong Chen

Other publications of authors with the same name

A 28nm 142mW Motion-Control SoC for Autonomous Mobile Robots.I. Lin, Z. Fu, W. Chen, L. Lin, N. Chang, C. Lin, C. Chen, and C. Yang. ISSCC, page 46-47. IEEE, (2023)An implantable 128-channel wireless neural-sensing microsystem using TSV-embedded dissolvable μ-needle array and flexible interposer.P. Huang, Y. Huang, S. Wu, Y. Hu, M. Lu, T. Sheng, F. Chang, C. Lin, N. Chang, H. Chen and 7 other author(s). ISCAS, page 1-4. IEEE, (2017)21.1 A Fully Integrated Genetic Variant Discovery SoC for Next-Generation Sequencing.Y. Wu, Y. Chen, C. Yang, C. Lee, C. Yu, N. Chang, L. Chen, J. Chang, C. Lin, H. Chen and 3 other author(s). ISSCC, page 322-324. IEEE, (2020)High-Efficiency Step-Down Multi-Mode Switching DC-DC Converter for IoT Devices.H. Yen, C. Wei, C. Chen, and T. Hsu. SoCC, page 449-454. IEEE, (2019)Multi-Project System-on-Chip (MP-SoC): A Novel Test Vehicle for SoC Silicon Prototyping.C. Huang, K. Lee, C. Yang, W. Hu, S. Wang, J. Chen, C. Chen, L. Van, C. Wu, W. Tsai and 1 other author(s). SoCC, page 137-140. IEEE, (2006)A 28nm 11.2TOPS/W Hardware-Utilization-Aware Neural-Network Accelerator with Dynamic Dataflow.C. Du, C. Tsai, W. Chen, L. Lin, N. Chang, C. Lin, C. Chen, and C. Yang. ISSCC, page 332-333. IEEE, (2023)A Fully Integrated End-to-End Genome Analysis Accelerator for Next-Generation Sequencing.Y. Chen, C. Yang, Y. Wu, C. Lee, W. Chen, L. Lin, N. Chang, C. Lin, C. Chen, J. Hung and 1 other author(s). ISSCC, page 44-45. IEEE, (2023)A novel design methodology for hybrid process 3D-IC.C. Huang, N. Chang, C. Chen, C. Lin, C. Wu, and C. Huang. VLSI-DAT, page 1-4. IEEE, (2012)Implementation and Prototyping of a Complex Multi-project System-on-a-chip.C. Huang, C. Wu, C. Yang, W. Chien, S. Chen, C. Chen, J. Wang, and C. Wey. ISCAS, page 2321-2324. IEEE, (2009)A 1.625 TOPS/W SOC for Deep CNN Training and Inference in 28nm CMOS.Y. Liu, C. Kung, M. Hsieh, H. Wang, C. Lin, C. Yu, C. Chen, and T. Chiueh. ESSCIRC, page 107-110. IEEE, (2021)

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Disambiguation of "Chen, Chi-Shi"

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Multi-Project System-on-Chip (MP-SoC): A Novel Test Vehicle for SoC Silicon Prototyping.

Please choose a person to relate this publication to

Chi Chen

Chi-yün Chen

Chi-Siang Chen

Liang-chi Chen

Chi-Rong Chen

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Chen, Chi-Shi"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Multi-Project System-on-Chip (MP-SoC): A Novel Test Vehicle for SoC Silicon Prototyping.

Please choose a person to relate this publication to

Chi Chen

Chi-yün Chen

Chi-Siang Chen

Liang-chi Chen

Chi-Rong Chen

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

Multi-Project System-on-Chip (MP-SoC): A Novel Test Vehicle for SoC Silicon Prototyping.