Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Asanovic, Krste
add a person with the name Asanovic, Krste
 

Other publications of authors with the same name

Optimizing Matrix Multiply Using PHiPAC: A Portable, High-Performance, ANSI C Coding Methodology., , , and . International Conference on Supercomputing, page 340-347. ACM, (1997)FASED: FPGA-Accelerated Simulation and Evaluation of DRAM., , , , , , and . FPGA, page 330-339. ACM, (2019)A 16mm2 106.1 GOPS/W Heterogeneous RISC-V Multi-Core Multi-Accelerator SoC in Low-Power 22nm FinFET., , , , , , , , , and 9 other author(s). ESSCIRC, page 259-262. IEEE, (2021)CDPU: Co-designing Compression and Decompression Processing Units for Hyperscale Systems., , , , , , , , , and 3 other author(s). ISCA, page 39:1-39:17. ACM, (2023)AutoPhase: Juggling HLS Phase Orderings in Random Forests with Deep Reinforcement Learning., , , , , , and . MLSys, mlsys.org, (2020)Victim Replication: Maximizing Capacity while Hiding Wire Delay in Tiled Chip Multiprocessors., and . ISCA, page 336-345. IEEE Computer Society, (2005)FPGA Accelerated INDEL Realignment in the Cloud., , , , , , , , , and 2 other author(s). HPCA, page 277-290. IEEE, (2019)Direction-optimizing breadth-first search., , and . SC, page 12. IEEE/ACM, (2012)FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud., , , , , , , , , and 6 other author(s). ISCA, page 29-42. IEEE Computer Society, (2018)An Energy-Efficient RISC-V RV32IMAC Microcontroller for Periodical-Driven Sensing Applications., , , , , , , , , and 11 other author(s). CICC, page 1-4. IEEE, (2020)