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Disambiguation of "San, Hao"

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A 12-bit 1.25MS/s Area-Efficient Radix-Value Self-Estimated Non-Binary Cyclic ADC with Relaxed Requirements on Analog Components.

, , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 100-A (2): 534-540 (2017)

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San San Lin

San San Hmwe

Wenjin Hao

Xiaofei Hao

San Thwin

 

Other publications of authors with the same name

Reducing Spurious Output of Balanced Modulators by Dynamic Matching of I, Q Quadrature Paths., , , , , and . IEICE Trans. Electron., 88-C (6): 1290-1294 (2005)A 2nd-Order ΔΣAD Modulator Using Dynamic Analog Components with Simplified Operation Phase., and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 101-A (2): 425-433 (2018)Linearity Compensation for Conversion Error in Non-binary and Binary Hybrid ADC., and . ISPACS, page 1-2. IEEE, (2021)A 14bit 80kSPS non-binary cyclic ADC without high accuracy analog components., , , , , and . ASP-DAC, page 15-16. IEEE, (2017)A 12-Bit 3.3MS/S pipeline cyclic ADC with correlated level shifting technique., , , , , , and . ISPACS, page 602-605. IEEE, (2017)A 6th-Order Complex Bandpass ΔΣ AD Modulator Using Dynamic Amplifier and Noise Coupling SAR Quantizer., and . ISPACS, page 447-452. IEEE, (2018)Non-binary cyclic and binary SAR hybrid ADC., , , and . MIXDES, page 105-109. IEEE, (2017)A Low-voltage Non-binary Cyclic ADC using Fully Differential Ring Amplifier., , , , , , and . ISPACS, page 1-2. IEEE, (2021)A 2.8-V Multibit Complex Bandpass Delta-Sigma-AD Modulator in 0.18µm CMOS., , , , , , and . ASP-DAC, page 96-97. IEEE Computer Society, (2007)ΔΣAD modulator for low power application., , , , , , , and . APCCAS, page 1232-1235. IEEE, (2008)