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Reliable analysis of settling errors in SC integrators-application to the design of high-speed ΣΔ modulators., , , и . ISCAS, стр. 417-420. IEEE, (2000)Description Languages and Tools for the Behavioural Simulation of SD Modulators: a Comparative Survey., , , , , и . FDL, стр. 121-133. ECSI, (2003)A 2.5-V Sigma-Delta modulator in 0.25-µm CMOS for ADSL., , , , и . ISCAS (3), стр. 301-304. IEEE, (2002)A 0.35µm CMOS 17-bit@40kS/s sensor A/D interface based on a programmable-gain cascade 2-1 Sigma Delta modulator., , , , , , , и . ISCAS (1), стр. 205-208. IEEE, (2004)An optimization-based tool for the high-level synthesis of discrete-time and continuous-time ΣΔ modulators in the Matlab/Simulink environment., , , , , , и . ISCAS (5), стр. 97-100. IEEE, (2004)Novel topologies of cascade ΣΔ modulators for low-voltage wideband applications., , и . ECCTD, стр. 136-139. IEEE, (2007)A Novel Design Methodology for Low-Power, Low-Noise LC-Based Digital-Controlled Oscillators., , , , и . ICECS 2022, стр. 1-4. IEEE, (2022)Gaussian Pyramid: Comparative Analysis of Hardware Architectures., , , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (9): 2308-2321 (2017)MATLAB/SIMULINK-Based High-Level Synthesis of Discrete-Time and Continuous-Time Sigma, Delta Modulators., , , , , , и . DATE, стр. 150-155. IEEE Computer Society, (2004)A 0.2-to-2MHz BW, 50-to-86dB SNDR, 16-to-22mW flexible 4th-order ΣΔ modulator with DC-to-44MHz tunable center frequency in 1.2-V 90-nm CMOS., , и . VLSI-SoC, стр. 47-52. IEEE, (2012)