Author of the publication

A 10b 1.25GS/s Residue Post-Amplified Pipelined-SAR ADC with Supply-and-Temperature Stabilized Open-Loop Residue Amplifier.

, , , , , , and . ISCAS, page 1-5. IEEE, (2023)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A 7b 2 GS/s Time-Interleaved SAR ADC with Time Skew Calibration Based on Current Integrating Sampler., , , , , and . A-SSCC, page 235-238. IEEE, (2018)A 10b 1.25GS/s Residue Post-Amplified Pipelined-SAR ADC with Supply-and-Temperature Stabilized Open-Loop Residue Amplifier., , , , , , and . ISCAS, page 1-5. IEEE, (2023)A 14b 500 MS/s Single-Channel Pipelined-SAR ADC With Reference Ripple Mitigation Techniques and Adaptively Biased Floating Inverter Amplifier., , , , , , , and . IEEE J. Solid State Circuits, 58 (10): 2709-2721 (October 2023)A Modified Interleaving Resonant Switched Capacitor Converter with Reduced Output Resistance and In-Situ Startup., and . ISCAS, page 1-4. IEEE, (2023)A 13b 500MS/s Dual-Residue Pipelined-SAR ADC with One-Way Switching Capacitive Interpolation and Background Offset Calibration., , , , , and . CICC, page 1-2. IEEE, (2024)A 7-bit 2 GS/s Time-Interleaved SAR ADC With Timing Skew Calibration Based on Current Integrating Sampler., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 68 (2): 557-568 (2021)A Modified Two-Stage Cascaded Hybrid Converter with Reduced Conduction Loss, Self-Balanced Flying Capacitors and Simplified Interleaving PWM., and . ISCAS, page 1-5. IEEE, (2023)A 28nm 53.8TOPS/W 8b Sparse Transformer Accelerator with In-Memory Butterfly Zero Skipper for Unstructured-Pruned NN and CIM-Based Local-Attention-Reusable Engine., , , , , , , , , and . ISSCC, page 250-251. IEEE, (2023)A Scalable Die-to-Die Interconnect with Replay and Repair Schemes for 2.5D/3D Integration., , , , , , , , , and 1 other author(s). ISCAS, page 1-5. IEEE, (2023)A 7.6mW 1GS/s 60dB SNDR Single-Channel SAR-Assisted Pipelined ADC with Temperature-Compensated Dynamic Gm-R-Based Amplifier., , , , and . ISSCC, page 60-62. IEEE, (2019)