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Disambiguation of "Yamamoto, Hideaki"

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A scalable MPEG-4 video codec architecture for IMT-2000 multimedia applications.

, , , , , , , , , , , , , , , , and . ISCAS, page 188-191. IEEE, (2000)

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Hideaki Takahashi

Hideaki Seki

Masaaki Yamamoto

Shelby Yamamoto

Kenji Yamamoto

 

Other publications of authors with the same name

Modularity-dependent modulation of synchronized bursting activity in cultured neuronal network models., , , , , , and . IJCNN, page 1163-1168. IEEE, (2017)A Fully Analog CMOS Implementation of a Two-variable Spiking Neuron in the Subthreshold Region and its Network Operation., , , , , and . IJCNN, page 1-7. IEEE, (2022)Contribution of AMPA and NMDA receptors in the spontaneous firing patterns of single neurons in autaptic culture., , , , , , and . Biosyst., (2020)A Subthreshold Spiking Neuron Circuit Based on the Izhikevich Model., , , , , , and . ICANN (5), volume 12895 of Lecture Notes in Computer Science, page 177-181. Springer, (2021)Quantitative Analysis of Dynamical Complexity in Cultured Neuronal Network Models for Reservoir Computing Applications., , , , and . IJCNN, page 1-6. IEEE, (2019)A 222mW H.264 Full-HD decoding application processor with x512b stacked DRAM in 40nm., , , , , , , , , and 4 other author(s). ISSCC, page 326-327. IEEE, (2010)Effective Subnetwork Topology for Synchronizing Interconnected Networks of Coupled Phase Oscillators., , , , and . Frontiers Comput. Neurosci., (2018)Ultra-Small Reader/Writer with Multiple Contactless Interfaces on a Flexible Circuit Board., , and . IEICE Trans. Commun., 92-B (9): 2992-2995 (2009)A scalable MPEG-4 video codec architecture for IMT-2000 multimedia applications., , , , , , , , , and 7 other author(s). ISCAS, page 188-191. IEEE, (2000)