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Disambiguation of "Zimmer, Brian"

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A 95.6-TOPS/W Deep Learning Inference Accelerator With Per-Vector Scaled 4-bit Quantization in 5 nm.

, , , , , , , , and . IEEE J. Solid State Circuits, 58 (4): 1129-1141 (2023)

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Rolf-Walter Briant

Benoît Briand

Annette Brians

Ursula Brian

Brian Alexander

 

Other publications of authors with the same name

Joint impact of random variations and RTN on dynamic writeability in 28nm bulk and FDSOI SRAM., , , , , and . ESSDERC, page 98-101. IEEE, (2014)Simba: scaling deep-learning inference with chiplet-based architecture., , , , , , , , , and 7 other author(s). Commun. ACM, 64 (6): 107-116 (2021)Reprogrammable Redundancy for SRAM-Based Cache Vmin Reduction in a 28-nm RISC-V Processor., , , and . IEEE J. Solid State Circuits, 52 (10): 2589-2600 (2017)Resilient Design Techniques for Improving Cache Energy Efficiency.. University of California, Berkeley, USA, (2015)Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture., , , , , , , , , and 7 other author(s). MICRO, page 14-27. ACM, (2019)A 95.6-TOPS/W Deep Learning Inference Accelerator With Per-Vector Scaled 4-bit Quantization in 5 nm., , , , , , , , and . IEEE J. Solid State Circuits, 58 (4): 1129-1141 (2023)A 1.17-pJ/b, 25-Gb/s/pin Ground-Referenced Single-Ended Serial Link for Off- and On-Package Communication Using a Process- and Temperature-Adaptive Voltage Regulator., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 54 (1): 43-54 (2019)AutoCRAFT: Layout Automation for Custom Circuits in Advanced FinFET Technologies., , , , , , , , , and . ISPD, page 175-183. ACM, (2022)On-chip supply power measurement and waveform reconstruction in a 28nm FD-SOI processor SoC., , , , , , , , and . A-SSCC, page 125-128. IEEE, (2016)VS-Quant: Per-vector Scaled Quantization for Accurate Low-Precision Neural Network Inference., , , , , and . CoRR, (2021)