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Disambiguation of "Horowitz, Mark"

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Open-Source Synthesizable Analog Blocks for High-Speed Link Designs: 20-GS/s 5b ENOB Analog-to-Digital Converter and 5-GHz Phase Interpolator.

, , , , and . CoRR, (2020)

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Flavio Horowitz

Alexander Horowitz

Pinchas Horowitz

Pinchas Horowitz

Wilhelm Horowitz

 

Other publications of authors with the same name

Towards an explanatory and computational theory of scientific discovery, , , , , and . CoRR, (2009)An Analytical Cache Model., , and . ACM Trans. Comput. Syst., 7 (2): 184-215 (1989)CMOS Image Sensors With Multi-Bucket Pixels for Computational Photography., , , , and . IEEE J. Solid State Circuits, 47 (4): 1031-1042 (2012)Energy-Performance Tunable Logic., , and . IEEE J. Solid State Circuits, 44 (9): 2554-2567 (2009)TANGRAM: Optimized Coarse-Grained Dataflow for Scalable NN Accelerators., , , , and . ASPLOS, page 807-820. ACM, (2019)Timing analysis including clock skew., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 18 (11): 1608-1618 (1999)False coupling exploration in timing analysis., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 24 (11): 1795-1805 (2005)A 700-Mb/s/pin CMOS signaling interface using current integrating receivers., and . IEEE J. Solid State Circuits, 32 (5): 681-690 (1997)A 0.4-4-Gb/s CMOS quad transceiver cell using on-chip regulated dual-loop PLLs., , , , , , , and . IEEE J. Solid State Circuits, 38 (5): 747-754 (2003)Unified Buffer: Compiling Image Processing and Machine Learning Applications to Push-Memory Accelerators., , , , , , , and . ACM Trans. Archit. Code Optim., 20 (2): 26:1-26:26 (June 2023)