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Disambiguation of "Tamarapalli, Nagesh"

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Diagnosis with Limited Failure Information.

, , , , , , and . ITC, page 1-10. IEEE Computer Society, (2006)

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Other publications of authors with the same name

High-Frequency, At-Speed Scan Testing., , , , , , and . IEEE Des. Test Comput., 20 (5): 17-25 (2003)Automated synthesis of phase shifters for built-in self-testapplications., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 19 (10): 1175-1188 (2000)Tutorial T3: DFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product Yield., and . VLSI Design, page 16-17. IEEE Computer Society, (2012)Achieving higher yield through diagnosis.. ITC, page 1. IEEE Computer Society, (2005)Tutorial T10: Post - Silicon Validation, Debug and Diagnosis., , , , , and . VLSI Design, IEEE Computer Society, (2013)Constructive Multi-Phase Test Point Insertion for Scan-Based BIST., and . ITC, page 649-658. IEEE Computer Society, (1996)The Next Step in Volume Scan Diagnosis: Standard Fail Data Format., , , , , , and . ATS, page 360-368. IEEE, (2006)Logic BIST for large industrial designs: real issues and case studies., , , , , and . ITC, page 358-367. IEEE Computer Society, (1999)Automated synthesis of large phase shifters for built-in self-test., , and . ITC, page 1047-1056. IEEE Computer Society, (1998)Embedded Deterministic Test for Low-Cost Manufacturing., , , , , and . IEEE Des. Test Comput., 20 (5): 58-66 (2003)