( en | de | ru )

 

Disambiguation of "Castellana, Vito Giovanni"

Author of the publication

copydeleteadd this publication to your clipboard
OpenCGRA: Democratizing Coarse-Grained Reconfigurable Arrays.

, , , , , , , , , and . ASAP, page 149-155. IEEE, (2021)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Laurence Victor Vito

Vito Giustiniani

Vito Pinto

Vito Stancanelli

Vito Roberto

 

Other publications of authors with the same name

High-level synthesis of memory bound and irregular parallel applications with Bambu., , and . Hot Chips Symposium, page 1. IEEE, (2014)A dynamically scheduled architecture for the synthesis of graph methods., , , , and . Hot Chips Symposium, page 1-7. IEEE, (2016)From High-Level Frameworks to custom Silicon with SODA., , , , , , , , , and 3 other author(s). HCS, page 1-13. IEEE, (2022)SODA: a New Synthesis Infrastructure for Agile Hardware Design of Machine Learning Accelerators., , , , , , , and . ICCAD, page 98:1-98:7. IEEE, (2020)A Dynamically Scheduled Architecture for the Synthesis of Graph Database Queries., , , , and . FCCM, page 136. IEEE Computer Society, (2016)An automated flow for the High Level Synthesis of coarse grained parallel applications., and . FPT, page 294-301. IEEE, (2013)Scaling Semantic Graph Databases in Size and Performance., , , , , , , and . IEEE Micro, 34 (4): 16-26 (2014)Bridging Python to Silicon: The SODA Toolchain., , , , , , , , , and 2 other author(s). IEEE Micro, 42 (5): 78-88 (2022)Automated Generation of Integrated Digital and Spiking Neuromorphic Machine Learning Accelerators., , , , , , , , , and 3 other author(s). ICCAD, page 1-7. IEEE, (2021)Practical Distributed Programming in C++., , and . HPDC, page 35-39. ACM, (2020)