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Design of True Random Number Generator Based on Multi-Ring Convergence Oscillator Using Short Pulse Enhanced Randomness.

T. Ni, Q. Peng, J. Bian, L. Yao, Z. Huang, A. Yan, S. Wang, и X. Wen. IEEE Trans. Circuits Syst. I Regul. Pap., 70 (12): 5074-5085 (декабря 2023)

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Ying Ni

Pedestrian safety at urban signalised intersectionsY. Ni. TU Darmstadt, (2009)

Yi Ni

Ji Ni

Xiaoju Ni

Shaoji Ni

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LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults.T. Ni, Y. Yao, H. Chang, L. Lu, H. Liang, A. Yan, Z. Huang, и X. Wen. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (10): 2938-2951 (2020)A novel in-field TSV repair method for latent faults.T. Ni, H. Chang, H. Qi, и Z. Huang. IEICE Electron. Express, 15 (23): 20180873 (2018)Chip test pattern reordering method using adaptive test to reduce cost for testing of ICs.T. Song, H. Liang, Z. Huang, T. Ni, и Y. Sun. IEICE Electron. Express, 18 (2): 20200420 (2021)A Novel Built-In Self-Repair Scheme for 3D Memory.T. Ni, H. Chang, Y. Yao, X. Li, и Z. Huang. IEEE Access, (2019)Design of True Random Number Generator Based on Multi-Stage Feedback Ring Oscillator.J. Cui, M. Yi, D. Cao, L. Yao, X. Wang, H. Liang, Z. Huang, H. Qi, T. Ni, и Y. Lu. IEEE Trans. Circuits Syst. II Express Briefs, 69 (3): 1752-1756 (2022)Design of True Random Number Generator Based on Multi-Ring Convergence Oscillator Using Short Pulse Enhanced Randomness.T. Ni, Q. Peng, J. Bian, L. Yao, Z. Huang, A. Yan, S. Wang, и X. Wen. IEEE Trans. Circuits Syst. I Regul. Pap., 70 (12): 5074-5085 (декабря 2023)Fortune: A New Fault-Tolerance TSV Configuration in Router-Based Redundancy Structure.Q. Xu, H. Geng, T. Ni, S. Chen, B. Yu, Y. Kang, и X. Wen. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (10): 3182-3187 (2022)Design of Radiation Hardened Latch and Flip-Flop with Cost-Effectiveness for Low-Orbit Aerospace Applications.A. Yan, A. Cao, Z. Xu, J. Cui, T. Ni, P. Girard, и X. Wen. J. Electron. Test., 37 (4): 489-502 (2021)SCLCRL: Shuttling C-elements based Low-Cost and Robust Latch Design Protected against Triple Node Upsets in Harsh Radiation Environments.A. Yan, Z. Li, S. Huang, Z. Zhai, X. Cheng, J. Cui, T. Ni, X. Wen, и P. Girard. DATE, стр. 1257-1262. IEEE, (2022)A Pulse Shrinking-Based Test Solution for Prebond Through Silicon via in 3-D ICs.M. Yi, J. Bian, T. Ni, C. Jiang, H. Chang, и H. Liang. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (4): 755-766 (2019)

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