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Reliability impact of advanced doping techniques for DRAM peripheral MOSFETs., , , , , , , and . ICICDT, page 1-4. IEEE, (2015)Thermally stable, packaged aware LV HKMG platforms benchmark to enable low power I/O for next 3D NAND generations., , , , , , , , , and 1 other author(s). IMW, page 1-4. IEEE, (2022)Isolation of nanowires made on bulk wafers by ground plane doping., , , , , and . ESSDERC, page 300-303. IEEE, (2017)Impact of Off State Stress on advanced high-K metal gate NMOSFETs., , , , , , and . ESSDERC, page 365-368. IEEE, (2014)NBTI in Si0.55Ge0.45 cladding p-FinFETs: Porting the superior reliability from planar to 3D architectures., , , , , , , , , and . IRPS, page 2. IEEE, (2015)Reliability challenges in Forksheet Devices: (Invited Paper)., , , , , , , , , and 2 other author(s). IRPS, page 1-8. IEEE, (2023)Gate-Stack Engineered NBTI Improvements in Highvoltage Logic-For-Memory High-ĸ/Metal Gate Devices., , , , , , , , , and 6 other author(s). IRPS, page 1-8. IEEE, (2019)I/O thick oxide device integration using Diffusion and Gate Replacement (D&GR) gate stack integration., , , , , , , , , and 2 other author(s). ICICDT, page 1-4. IEEE, (2015)High Performance Thermally Resistant FinFETs DRAM Peripheral CMOS FinFETs with VTH Tunability for Future Memories., , , , , , , , , and 12 other author(s). VLSI Technology and Circuits, page 306-307. IEEE, (2022)Towards high performance sub-10nm finW bulk FinFET technology., , , , , , , , , and 10 other author(s). ESSDERC, page 131-134. IEEE, (2016)